The present invention relates to an interposer, and an electronic device fabrication method using the interposer, more specifically, an interposer which can simplify test steps, and an electronic device fabrication method using the interposer.
Recently, in digital LSIs (Large Scale Integrated circuits), etc., typically microprocessors, the operation speed increase and the power consumption decrease have been made.
To stably operate an LSI in a GHz band-radio-frequency region and at low voltage, it is very important to suppress the source voltage variation due to abrupt changes of the load impedance, etc. of the LSI and to remove radio-frequency noises of the power source.
Conventionally, the source voltage change is suppressed, and the radio-frequency noises are removed by mounting decoupling capacitors near an LSI, etc. mounted on a circuit board. The decoupling capacitors are formed on a substrate discrete from the circuit board and are mounted suitably on the circuit board.
However, when decoupling capacitors are mounted near an LSI mounted on a circuit board, the LSI and the decoupling capacitors are electrically connected to the decoupling capacitors via interconnection formed in the circuit board, and large inductance due to the wiring is present. Due to the large inductance between the LSI and the decoupling capacitors, the source voltage variation cannot be sufficiently suppressed, and the radio-frequency noises cannot be sufficiently removed. To make the suppression of the source voltage variation and the removal of the radio-frequency noises sufficient, the equivalent series resistance (ESR) and the equivalent series inductance (ESL) are required to be decreased.
Here, the technique of disposing between the LSI and the circuit board an interposer with capacitor incorporated in is noted (Patent References 1 to 5).
Following references disclose the background art of the present invention.
[Patent Reference 1]
Specification of Japanese Patent Application Unexamined Publication No. Hei 4-211191
[Patent Reference 2]
Specification of Japanese Patent Application Unexamined Publication No. Hei 7-176453
[Patent Reference 3]
Specification of Japanese Patent Application Unexamined Publication No. 2001-68583
[Patent Reference 4]
Specification of Japanese Patent Application Unexamined Publication No. 2001-35990
[Patent Reference 5]
Specification of Japanese Patent Application Unexamined Publication No. 2002-83892
[Patent Reference 6]
Specification of Japanese Patent Application Unexamined Publication No. 2003-158239
[Patent Reference 7]
Specification of Japanese Patent No. 3014383
[Patent Reference 8]
Specification of Japanese Patent Application Unexamined Publication No. 2003-282827
However, in testing the characteristics of the thin-film capacitors of the proposed interposer, a probe is connected sequentially to the respective through-electrodes connected to the thin-film capacitors for the test. Accordingly, it is difficult to test the proposed interposer in a short period of time and at low costs.